DIGITAL DESIGN
Stampa
Enrollment year
2019/2020
Academic year
2020/2021
Regulations
DM270
Academic discipline
ING-INF/05 (DATA PROCESSING SYSTEMS)
Department
DEPARTMENT OF ELECTRICAL,COMPUTER AND BIOMEDICAL ENGINEERING
Course
ELECTRONIC AND COMPUTER ENGINEERING
Curriculum
PERCORSO COMUNE
Year of study
Period
2nd semester (08/03/2021 - 14/06/2021)
ECTS
6
Lesson hours
50 lesson hours
Language
Italian
Activity type
WRITTEN AND ORAL TEST
Teacher
TORTI EMANUELE - 6 ECTS
Prerequisites
Programming fundamentals.
Learning outcomes
This course is meant to address the fundamentals of Boole's algebra, the methods and the tecniques of Analisys and Design of the Logic Networks, both combinatorial and sequential, (asynchronous and synchronous) and a description of the functions of the Arithmetic/Logic Unit in the scenario of the architecture of a numeric processor. The practice lessons are about analysis and synthesis of Logical Networks and algorithms for math operations. They aim to the understanding the functions of the Arithmetic/Logic Unit and its performances.
Course contents
Logical Network Module
Sito Web: vision.unipv.it/reti-logiche
Introduction to Boole's Algebra
Introduction to Logic and Set Theory; Boole's Algebra; boolean expressions and functions; consensus theorem; canonical forms; implicants and implicates; representation of boolean functions; simplification of boolean functions and minimum cost functions (method of Karnaugh maps, method of Tison, method of Quine-McCluskey; Petrick function).

Combinatorial networks
Combinatorial networks; logic variables and electrical signals; elementary electronic components; elementary functional blocks: And, Or, Not, Nor, Nand, Xor, Analysis of Combinatorial networks; Synthesis of Combinatorial networks. Elementary Combinatorial networks: adder, coder and decoder, multiplexer, ROM. Transients in Combinatorial networks: static hazards.
Sequential networks
Sequential networks: internal state; finite state machines, minimum machines; method of the triangular table, equivalent machines and compatible machines. Asynchronous machines, critical paths. Synchronous machines. Analysis of sequential machines, temporal analysis. Synthesis of sequential machines: states assignment. Remarkable Sequential networks: Latch and Flip–Flops, registers, counters, sequence detectors, serial and parallel adders.
Teaching methods
Logical Network Module:
Lectures (hours/year in lecture theatre): 45
Practical class (hours/year in lecture theatre): 0
Practicals / Workshops (hours/year in lecture theatre): 0
Reccomended or required readings
M. Morris Mona, Charles R. Kime. Logic and Computer Design Fundamentals. Pearson -Prentice Hall, 2008, IV edition.
Assessment methods
The exam of the Logical Network module consists of a written test followed by the chance to sustain an oral examination to improve the final rank.
Further information
Sustainable development goals - Agenda 2030