LOGICAL NETWORKS AND COMPUTERS
Stampa
Enrollment year
2017/2018
Academic year
2018/2019
Regulations
DM270
Department
DEPARTMENT OF ELECTRICAL,COMPUTER AND BIOMEDICAL ENGINEERING
Course
ELECTRONIC AND COMPUTER ENGINEERING
Curriculum
PERCORSO COMUNE
Year of study
Period
2nd semester (06/03/2019 - 14/06/2019)
ECTS
12
Language
Italian
Prerequisites
Programming fundamentals.
Learning outcomes
This course is meant to address the fundamentals of Boole's algebra, the methods and the techniques of Analysis and Design of the Logic Networks, both combinatorial and sequential, (asynchronous and synchronous) and a description of the functions of the Arithmetic/Logic Unit in the scenario of the architecture of a numeric processor. The practice lessons are about analysis and synthesis of Logical Networks and algorithms for math operations. They aim to the understanding the functions of the Arithmetic/Logic Unit and its performances. Besides, the teaching introduces the architecture of microprocessors and microcomputers, explaining its behavior by the usage of the Assembly Language. The teaching aims to emphasize the relations among the computer architecture, the microelectronics techniques and the base software organization. The practice lessons relate to the Assembly Language and the tuning of simple programs in a dedicated development environment.
Course contents
This course is based on the Logical Network Module and Computer Architecture Module.

Introduction to Boole's Algebra
Introduction to Logic and Set Theory; Boole's Algebra; boolean expressions and fuctions; consensus theorem; canonical forms; implicants and implicates; representation of boolean functions; simplification of boolean functions and minimum cost functions (method of Karnaugh maps, method of Tison, method of Quine-McCluskey; Petrick function).

Combinatorial networks
Combinatorial networks; logic variables and electrical signals; elementary electronic components; elementary functional blocks: And, Or, Not, Nor, Nand, Xor, Analysis of Combinatorial networks; Synthesis of Combinatorial networks. Elementary Combinatorial networks: adder, coder and decoder, multiplexer, ROM. Transients in Combinatorial networks: static hazards.

Sequential networks
Sequential networks: internal state; finite state machines, minimum machines; method of the triangular table, equivalent machines and compatible machines. Asynchronous machines, critical paths. Synchronous machines. Analysis of sequential machines, temporal analysis. Synthesis of sequential machines: states assignment. Remarkable Sequential networks: Latch and Flip–Flops, registers, counters, sequence detectors, serial and parallel adders.

Computer Architecture Module:
Architecture of a processor
Functional blocks: memory, arithmetic unit, input and output units, control unit. Unit interconnection: bus. Interruption. Hardware e software. Functional blocks flow chart for a processor. Instruction flow and data flow. Information representation, relative numbers, conversion between representations, real numbers. Arithmetic unit, Ripple Carry adder and Carry Look Ahead adder.

Assembly language
Addressing techniques and Assembly instructions. Interrupts management. Assembler, linker-loader, development environment and simulator. Examples.
Teaching methods
For Logical Network Module:
Lectures (hours/year in lecture theatre): 45
Practical class (hours/year in lecture theatre): 0
Practicals / Workshops (hours/year in lecture theatre): 0
For Computer Architecture module:
Lectures (hours/year in lecture theatre): 37.5
Practical class (hours/year in lecture theatre): 12.5
Practicals / Workshops (hours/year in lecture theatre): 0
Reccomended or required readings
M. Morris Mona, Charles R. Kime. Logic and Computer Design Fundamentals. Pearson -Prentice Hall, 2008, IV edition.

Patterson D.A., Hennessy J.L. Computer organization and design: the hardware-software interface. Morgan Kaufmann Publishers, 2014, V edition.
Assessment methods
The exam of the Logical Network module consists of a written test followed by the chance to sustain an oral examination to improve the final rank.
The exam of the Computer Architecture module consists of a written test followed by a practical exercise based on assembly programming, validation and debugging.
Further information
The exam of the Logical Network module consists of a written test followed by the chance to sustain an oral examination to improve the final rank.
The exam of the Computer Architecture module consists of a written test followed by a practical exercise based on assembly programming, validation and debugging.


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